SPARK Microsystems is looking for a motivated Technical-Lead of Analog ASIC Development, you will be responsible for leading a team of 5+ RF and Analog ASIC Engineers and Scientists in the product development life cycle of wireless ASICs and SoCs that are used in range of SPARK Microsystems products such as mice, audio headsets, speakers, proximity detection, ranging and IoT. With a responsibility to help your team develop their skills, you coach and mentor them, empowering them to innovate and perform at their best. Synch up with the other technical leads and managers to remove blockers and keep activities moving forward in an Agile Scrum environment. This position reports to the Director of ASIC.
- Oversee all aspects of RF and Analog ASIC Development from concept to production.
- Provide technical oversight by reviewing design, simulation, and validations to ensure a successful tape-out.
- Plan activities of the team and support the Project Manager to ensure deliveries are met.
- Allocate resources on tasks and manage the workload.
- Maintain, improve, and document the RF and Analog ASIC development life cycle process
- Participate in the annual budgeting process, and review of the team members.
- Work with the ASIC architects to define the requirements for RF, analog and baseband blocks based of the product.
- Design RF and analog blocks in CMOS technologies and produce technical documentation (schematics, reports, etc.).
- Support the testing and debugging of issues that may arise from early development stages through productization.
- May work with the production teams through the development phase and optimizing the designs for increased manufacturing efficiency.
- Collaborates with the Operations Teams on yield analysis and improvements
- Master’s or PhD in Electrical Engineering or equivalent.
- 10 years management experience in ASIC Development, SoC and/or Silicon Development with significant hands-on development experience
- Solid Experience in being part of the development of CMOS mixed-signal or RF ASICs with significant hands-on experience in Architecture.
- Experience in Cadence or Synopsys analog design flow
- Familiarity with silicon qualification
- Familiarity with ASIC Back-end processes
- Ability to dive into and take ownership for critical design issues
- Ability to address all aspects of technology readiness, including manufacturability
- Excellent Technical and People Management Skills
- Excellent written and verbal communication skills
- Demonstrated creative and critical thinking skills
- Understands and deals well with fast development cycles
- Highly passionate and energetic mindset with rigor
- Bilingual English/French an asset
To apply, send your CV and cover letter (in PDF format) to email@example.com