swc_def.h
SPARK Wireless Core definitions.
- Copyright
Copyright (C) 2026 SPARK Microsystems International Inc. All rights reserved.
- License
This source code is proprietary and subject to the SPARK Microsystems Software EULA found in this package in file EULA.txt.
- Author
SPARK FW Team.
Typedefs
-
typedef enum swc_role swc_role_t
Node’s Role.
-
typedef enum swc_sleep_level swc_sleep_level_t
Node’s Sleep Level.
-
typedef enum swc_isi_mitig swc_isi_mitig_t
Node’s ISI mitigation level.
-
typedef enum swc_chip_rate swc_chip_rate_t
Node’s chip rate.
-
typedef enum swc_irq_polarity swc_irq_polarity_t
Radio’s Interrupt Request Polarity.
-
typedef enum swc_spi_mode swc_spi_mode_t
Radio’s SPI mode.
-
typedef enum swc_outimped swc_outimped_t
Radio’s digital output driver impedance.
-
typedef enum swc_modulation swc_modulation_t
Connection’s Modulation.
-
typedef enum swc_chip_repetition swc_chip_repetition_t
Connection’s CHIP repetition.
-
typedef enum swc_fec_ratio swc_fec_ratio_t
Connection’s Forward Error Correction Ratio.
Note
FEC Ratio is (FEC_RATIO + 9) / 8.
-
typedef enum swc_cca_fail_action swc_cca_fail_action_t
Clear Channel Assessment Fail Action.
Note
Selects what the Wireless Core does when every CCA attempt fails, meaning the channel is still sensed busy after the last energy reading.
-
typedef enum swc_event swc_event_t
Wireless core events.
-
typedef enum swc_concurrency_mode swc_concurrency_mode_t
Concurrency modes.
-
typedef enum swc_phy_mode swc_phy_mode_t
QoS modes.
Enums
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enum swc_role
Node’s Role.
Values:
-
enumerator SWC_ROLE_COORDINATOR
Node acts as the Coordinator.
-
enumerator SWC_ROLE_NODE
Node has no special function.
-
enumerator SWC_ROLE_COORDINATOR
-
enum swc_sleep_level
Node’s Sleep Level.
Values:
-
enumerator SWC_SLEEP_IDLE
Idle sleep level.
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enumerator SWC_SLEEP_SHALLOW
Shallow sleep level.
-
enumerator SWC_SLEEP_DEEP
Deep sleep level.
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enumerator SWC_SLEEP_IDLE
-
enum swc_isi_mitig
Node’s ISI mitigation level.
Values:
-
enumerator SWC_ISI_MITIG_0
Inter-symbol interference mitigation level 0.
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enumerator SWC_ISI_MITIG_1
Inter-symbol interference mitigation level 1.
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enumerator SWC_ISI_MITIG_2
Inter-symbol interference mitigation level 2.
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enumerator SWC_ISI_MITIG_3
Inter-symbol interference mitigation level 3.
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enumerator SWC_ISI_MITIG_0
-
enum swc_chip_rate
Node’s chip rate.
Values:
-
enumerator SWC_CHIP_RATE_20_48_MHZ
Enable 20.48 MHz Chip rate.
-
enumerator SWC_CHIP_RATE_27_30_MHZ
Enable 27.30 MHz Chip rate.
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enumerator SWC_CHIP_RATE_40_96_MHZ
Enable 40.96 MHz Chip rate.
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enumerator SWC_CHIP_RATE_20_48_MHZ
-
enum swc_irq_polarity
Radio’s Interrupt Request Polarity.
Values:
-
enumerator SWC_IRQ_ACTIVE_HIGH
Interrupt pin active in high state.
-
enumerator SWC_IRQ_ACTIVE_LOW
Interrupt pin active in low state.
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enumerator SWC_IRQ_ACTIVE_HIGH
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enum swc_spi_mode
Radio’s SPI mode.
Values:
-
enumerator SWC_SPI_STANDARD
SPI timings are standard.
-
enumerator SWC_SPI_FAST
SPI timings are optimized for high capacitive load on the bus.
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enumerator SWC_SPI_STANDARD
-
enum swc_outimped
Radio’s digital output driver impedance.
Values:
-
enumerator SWC_OUTIMPED_0
output impedance 0.
-
enumerator SWC_OUTIMPED_1
output impedance 1.
-
enumerator SWC_OUTIMPED_2
output impedance 2.
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enumerator SWC_OUTIMPED_3
output impedance 3.
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enumerator SWC_OUTIMPED_0
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enum swc_modulation
Connection’s Modulation.
Values:
-
enumerator SWC_MOD_OOK
OOK modulation.
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enumerator SWC_MOD_IOOK
inverted OOK modulation.
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enumerator SWC_MOD_PPM
PPM modulation.
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enumerator SWC_MOD_2BITPPM
2 bit PPM modulation.
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enumerator SWC_MOD_OOK
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enum swc_chip_repetition
Connection’s CHIP repetition.
Values:
-
enumerator SWC_CHIP_REPET_1
1 chip repetition.
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enumerator SWC_CHIP_REPET_2
2 chip repetition.
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enumerator SWC_CHIP_REPET_3
3 chip repetition.
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enumerator SWC_CHIP_REPET_4
4 chip repetition.
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enumerator SWC_CHIP_REPET_1
-
enum swc_fec_ratio
Connection’s Forward Error Correction Ratio.
Note
FEC Ratio is (FEC_RATIO + 9) / 8.
Values:
-
enumerator SWC_FEC_1_0_0_0
FEC ratio 1.00.
-
enumerator SWC_FEC_1_2_5_0
FEC ratio 1.25.
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enumerator SWC_FEC_1_3_7_5
FEC ratio 1.375.
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enumerator SWC_FEC_1_5_0_0
FEC ratio 1.50.
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enumerator SWC_FEC_1_6_2_5
FEC ratio 1.625.
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enumerator SWC_FEC_1_7_5_0
FEC ratio 1.75.
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enumerator SWC_FEC_1_8_7_5
FEC ratio 1.875.
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enumerator SWC_FEC_2_0_0_0
FEC ratio 2.00.
-
enumerator SWC_FEC_1_0_0_0
-
enum swc_cca_fail_action
Clear Channel Assessment Fail Action.
Note
Selects what the Wireless Core does when every CCA attempt fails, meaning the channel is still sensed busy after the last energy reading.
Values:
-
enumerator SWC_CCA_FORCE_TX
Transmit anyway. When all readings fail, the frame is forced out after one additional retry_time delay, transmitting directly instead of performing a final CCA check. Favors link availability at the cost of a higher risk of colliding with another transmission.
-
enumerator SWC_CCA_ABORT_TX
Abort the transmission. The frame is not sent and stays in the TX queue to be retried at the connection’s next timeslot. Avoids risking a collision with another device on the channel, at the cost of added latency.
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enumerator SWC_CCA_FORCE_TX
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enum swc_event
Wireless core events.
Values:
-
enumerator SWC_EVENT_NONE
No event.
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enumerator SWC_EVENT_CONNECT
The connection is established between nodes.
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enumerator SWC_EVENT_DISCONNECT
The connection is broken between nodes.
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enumerator SWC_EVENT_ERROR
An error occurred on the wireless core.
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enumerator SWC_EVENT_NONE
-
enum swc_concurrency_mode
Concurrency modes.
Values:
-
enumerator SWC_CONCURRENCY_MODE_HIGH_PERFORMANCE
Concurrency mode for high performance MCU.
-
enumerator SWC_CONCURRENCY_MODE_LOW_PERFORMANCE
Concurrency mode for low performance MCU.
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enumerator SWC_CONCURRENCY_MODE_HIGH_PERFORMANCE
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enum swc_phy_mode
QoS modes.
Values:
-
enumerator SWC_CHIP_RATE_20_48_ISI_2
20.48 MHz with ISI mitigation on preamble and payload (10.24 MHz effective).
-
enumerator SWC_CHIP_RATE_27_30_ISI_2
27.30 MHz ID without ISI mitigation on preamble and payload (14.15 MHz effective).
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enumerator SWC_CHIP_RATE_20_48_ISI_1
20.48 MHz without ISI on preamble only (20.48 MHz effective).
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enumerator SWC_CHIP_RATE_27_30_ISI_1
27.30 MHz with ISI on preamble only (27.30 MHz effective).
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enumerator SWC_CHIP_RATE_40_96_ISI_1
40.96 MHz ID without ISI on preamble only (40.96 MHz effective).
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enumerator _SWC_CHIP_RATE_COUNT
Number of PHY modes.
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enumerator SWC_CHIP_RATE_20_48_ISI_2