Hardware Platform Requirements¶
This section aims to help users choose an MCU that has all the necessary peripherals required to satisfy application requirements. Processing performance can then be evaluated on the ported design.
MCU Resources¶
An MCU with the following resources is required to interface with SR1000 Series transceivers with the Wireless Core:
Core Type:
ARM Cortex-M
MCU features:
1x GPIO pin to drive the transceiver’s Reset pin
1x GPIO pin to serve as the SPI Chip Select
1x GPIO pin to drive the transceiver’s Shutdown pin (if feature is used)
1x External interrupt pin for servicing the transceiver’s IRQs
1x SPI bus controller configured as master
1x software interrupt
2x DMA channels linked to the SPI peripheral
1x 250 microsecond-resolution free-running timer (Optional for Stop and Wait feature)
1x millisecond resolution delay
Note
The dual radio feature is not supported by the EVK1.4 hardware.
Core Type:
ARM Cortex-M
MCU features:
2x GPIO pin to drive the transceiver’s Reset pin
2x GPIO pin to serve as the SPI Chip Select
2x GPIO pin to drive the transceiver’s Shutdown pin (if feature is used)
2x External interrupt pin for servicing the transceiver’s IRQs
2x SPI bus controller configured as master
1x software interrupt
4x DMA channels for the SPI data transfers between the MCU and the transceiver
1x 250 microsecond-resolution free-running timer (Optional for Stop and Wait feature)
1x millisecond resolution blocking timer
1x 20.48 MHz 16-bit free running timer.
The CPU load is expected to be approximately 1.5 times greater than single radio (varies depending on application).
MCU Performance¶
The following hardware features will impact the speed of execution of a given application.
CPU cores
Some CPU cores (e.g. ARM Cortex-M4) may be more or less efficient than others for a given task.
CPU clock speed
Running a given CPU core at a higher clock speed will result in faster processing time, which is sometimes required for higher performance applications.
SPI Throughput
SPARK transceivers use SPI for all communications with the MCU, whether it is for frame transfers or configuration. It is important to select an MCU with an SPI throughput that can satisfy the application requirements. SPI clock speed, byte interspacing and initial setup time are all dependent on the selected MCU.
MCU architecture
Some MCUs have hardware accelerators, multiple cores, direct memory access (DMA) buses for efficient non-blocking data transfers and faster memory zones for code execution.
For example, the STM32G473 MCU on SPARK’s EVK1.4 carrier board has CCM (Core-Coupled Memory) where critical code can be copied and executed from without any waiting states leading to faster response and lower execution times.
Memory Size
More memory means more room for code optimization (e.g. inline functions or unrolled loops are usually executed faster but take more space). See Memory section for information about memory size required by the SPARK Wireless Core.
Note
We assume that the user has selected an MCU which is suitable for the targeted application. The focus of this porting guide will be on outlining the firmware changes required to support a customer specific hardware platform which can include an MCU that is different than the one used on SPARK’s EVK1.4 carrier board.